UP2 (squared)

[Brian Beuken]

Upgraded to Ubuntu 16.04LTS
Fairly painless, and I can't honestly say it is all in place since I only care about a few specific features. But its smooth and effective and easy though I do get a very odd command line brian@brian-UP-APL01-Invalid-entry-length-0-DMI-table-is-broken-Stop:~$
hmmm...not to worry, maybe a linux guru can explain what I did wrong.

Had to install SSH server and Mesa libs, but, all good, since the intel graphics are well documented I'm fairly sure that the mesa libs are using hardware.
Its still a blindingly fast unit , much faster even than the XU4 with its 8 cores, this dual core Celeron is impressive, I wish I had bought one of the Pentiums now..but the cost was wayyy to high.

This is also a OpenGLES3.2 system, so it will be a good thing to run a few test projects on as a max power system (that and a PC) and compare performance with a lesser system like a NanoT4 for example.

Where this might fall down though is in multicore coding which I'm doing some work on now for my students, as a simple dual core Celeron it really can only handle 1 thread from the main core.. That creates an interesting issue of what to send to a job manager and wether to use the 2nd core as a simple job system while allowing the main core to run the bulk of the program.

Entering lscpu gives us this.
Architecture:          x86_64
CPU op-mode(s):        32-bit, 64-bit
Byte Order:            Little Endian
CPU(s):                2
On-line CPU(s) list:   0,1
Thread(s) per core:    1
Core(s) per socket:    2
Socket(s):             1
NUMA node(s):          1
Vendor ID:             GenuineIntel
CPU family:            6
Model:                 92
Model name:            Intel® Celeron® CPU N3350 @ 1.10GHz
Stepping:              9
CPU MHz:               1077.146
CPU max MHz:           2400,0000
CPU min MHz:           800,0000
BogoMIPS:              2188.80
Virtualization:        VT-x
L1d cache:             24K
L1i cache:             32K
L2 cache:              1024K
NUMA node0 CPU(s):     0,1


Actually this makes me doubt my assertion about the messed up MD2's, both the raspberry and Up2 are little endian, as is the data....something is off, I'll set them up side by side and compare the data they send to the VBO which might give me clues.

But thats all for now with this, have to leave it for a while as I have Chapter 7 and 8 clean ups to do and also some Z80 and school work.